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Merge pull request #21872 from maribu/dist/tools/PyCortexMDebug
cpu/{sam0_common,stm32}: Provide SVD_VENDOR and SVD_MODEL
2 parents 41fb5a1 + 9a5a8e3 commit 8007a1f

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2 files changed

+53
-6
lines changed

2 files changed

+53
-6
lines changed

cpu/sam0_common/Makefile.include

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,13 @@
11
# Define the CPU family so we can differentiate between them in the code
22
CFLAGS += -DCPU_FAM_$(call uppercase_and_underscore,$(CPU_FAM))
33

4+
CPU_MODEL_UPPERCASE := $(call uppercase_and_underscore,$(CPU_MODEL))
45
# Generate ASF compatible model definition
5-
CFLAGS += -D__$(call uppercase_and_underscore,$(CPU_MODEL))__
6+
CFLAGS += -D__$(CPU_MODEL_UPPERCASE)__
7+
8+
# Identify SVD file to load with `USE_PYCORTEXMDEBUG=1`:
9+
SVD_VENDOR := Atmel
10+
SVD_MODEL := AT$(CPU_MODEL_UPPERCASE)
611

712
# Compute CPU_LINE
813
LINE := $(shell echo $(CPU_MODEL) | sed -E -e 's/^sam([a-z][0-9][0-9])(.)([0-9][0-9])(.)*/\1 \2 \3 \4/')

cpu/stm32/stm32_info.mk

Lines changed: 47 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -33,19 +33,61 @@ SVD_VENDOR := STMicro
3333

3434
ifeq (f0,$(CPU_FAM))
3535
CPU_CORE = cortex-m0
36-
else ifneq (,$(filter $(CPU_FAM),f1 f2 l1))
36+
ifneq (,$(filter $(STM32_MODEL),031 042 072 091))
37+
SVD_MODEL := STM32F$(STM32_MODEL)x
38+
endif
39+
ifeq (030,$(STM32_MODEL))
40+
SVD_MODEL := STM32F$(STM32_MODEL)
41+
endif
42+
else ifeq (f1,$(CPU_FAM))
3743
CPU_CORE = cortex-m3
38-
else ifneq (,$(filter $(CPU_FAM),f3 f4 l4 mp1))
44+
SVD_MODEL := STM32F$(STM32_MODEL)xx
45+
else ifeq (f2,$(CPU_FAM))
46+
CPU_CORE = cortex-m3
47+
SVD_MODEL := STM32F2$(STM32_MODEL2)x
48+
else ifeq (l1,$(CPU_FAM))
49+
CPU_CORE = cortex-m3
50+
# TODO: Memory map description is split over multiple SVD files, but this
51+
# is not yet supported by the build system. We load the common STM32L1xx
52+
# SVD file only for now
53+
SVD_MODEL := STM32L1xx
54+
else ifeq (f3,$(CPU_FAM))
55+
CPU_CORE = cortex-m4f
56+
ifneq (,$(filter $(STM32_MODEL3),4 8))
57+
SVD_MODEL := STM32F3x$(STM32_MODEL3)
58+
else
59+
SVD_MODEL := STM32F$(STM32_MODEL)
60+
endif
61+
else ifeq (f4,$(CPU_FAM))
62+
CPU_CORE = cortex-m4f
63+
SVD_MODEL := STM32F$(STM32_MODEL)
64+
else ifeq (l4,$(CPU_FAM))
65+
CPU_CORE = cortex-m4f
66+
SVD_MODEL := STM32L4x$(STM32_MODEL3)
67+
else ifeq (mp1,$(CPU_FAM))
3968
CPU_CORE = cortex-m4f
40-
else ifneq (,$(filter $(CPU_FAM),g4 wb wl))
69+
else ifeq (g4,$(CPU_FAM))
70+
CPU_CORE = cortex-m4
71+
SVD_MODEL := STM32G$(STM32_MODEL)xx
72+
else ifneq (,$(filter $(CPU_FAM),wb wl))
4173
CPU_CORE = cortex-m4
4274
else ifeq (f7,$(CPU_FAM))
4375
CPU_CORE = cortex-m7
4476
SVD_MODEL := STM32F7x$(STM32_MODEL3)
45-
else ifneq (,$(filter $(CPU_FAM),g0 l0 c0))
77+
else ifeq (g0,$(CPU_FAM))
78+
CPU_CORE = cortex-m0plus
79+
SVD_MODEL := STM32G$(STM32_MODEL)
80+
else ifeq (l0,$(CPU_FAM))
4681
CPU_CORE = cortex-m0plus
47-
else ifneq (,$(filter $(CPU_FAM),l5 u5))
82+
SVD_MODEL := STM32L0x$(STM32_MODEL3)
83+
else ifeq (c0,$(CPU_FAM))
84+
CPU_CORE = cortex-m0plus
85+
else ifeq (l5,$(CPU_FAM))
86+
CPU_CORE = cortex-m33
87+
SVD_MODEL := STM32L$(STM32_MODEL)
88+
else ifeq (u5,$(CPU_FAM))
4889
CPU_CORE = cortex-m33
90+
SVD_MODEL := STM32U$(STM32_MODEL)
4991
else
5092
$(error Not supported CPU family: '$(CPU_FAM)')
5193
endif

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