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Merge pull request #221 from YosysHQ/micko/fix_globals
Fix for global routing on XO2/XO3
2 parents c99b22d + a53754a commit f1e5710

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9 files changed

+24
-11
lines changed

9 files changed

+24
-11
lines changed

fuzzers/machxo3/020-center-mux/6900/fuzzer.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -72,8 +72,8 @@ def fc_filter_dcc(a, n):
7272
# Thanks to fc_filter_dcc, make sure to manually connect DCC outputs to
7373
# entrance to global network!
7474
{
75-
"netnames" : ["R13C19_VPRX0000", "R13C19_VPRX0100", "R13C19_VPRX0200", "R13C19_VPRX0300",
76-
"R13C19_VPRX0400", "R13C19_VPRX0500", "R13C19_VPRX0600", "R13C19_VPRX0700"],
75+
"netnames" : ["R17C19_VPRX0000", "R17C19_VPRX0100", "R17C19_VPRX0200", "R17C19_VPRX0300",
76+
"R17C19_VPRX0400", "R17C19_VPRX0500", "R17C19_VPRX0600", "R17C19_VPRX0700"],
7777
"cfg" : FuzzConfig(job="GLOBAL_DCC_OUT", family="MachXO3", device="LCMXO3LF-6900C", ncl="center-mux.ncl",
7878
tiles=["CENTER13:CENTER_EBR_CIB_4K", "CENTER_EBR29:CENTER_EBR",
7979
"CENTER16:CENTER8", "CENTER15:CENTER7", "CENTER14:CENTER6",

fuzzers/machxo3/022-glb-cib_ebr/2100/fuzzer.py

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ def mk_nets(tilepos, glb_ids):
1010

1111
# Up/Down conns
1212
ud_nets.extend(net_product(
13-
net_product(["R6C{}_VPTX0{{}}00", "R11C{}_VPTX0{{}}00"], [tilepos[1]]),
13+
net_product(["R5C{}_VPTX0{{}}00", "R11C{}_VPTX0{{}}00"], [tilepos[1]]),
1414
glb_ids))
1515

1616
# Phantom DCCs- First fill in "T"/"B", and then global id
@@ -28,6 +28,8 @@ def flatten_nets(tilepos):
2828
jobs = [
2929
(FuzzConfig(job="CIB0_EBR0_END0_UPDOWN", family="MachXO3", device="LCMXO3LF-2100C", ncl="tap.ncl",
3030
tiles=["CIB_R8C1:CIB_EBR_DUMMY_END3"]), flatten_nets((8,1))),
31+
(FuzzConfig(job="CIB0_EBR2_END1_UPDOWN", family="MachXO3", device="LCMXO3LF-2100C", ncl="tap.ncl",
32+
tiles=["CIB_R8C26:CIB_EBR2_END0"]), flatten_nets((8,26)))
3133
]
3234

3335
def main(args):

fuzzers/machxo3/022-glb-cib_ebr/4300/fuzzer.py

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ def mk_nets(tilepos, glb_ids):
1010

1111
# Up/Down conns
1212
ud_nets.extend(net_product(
13-
net_product(["R11C{}_VPTX0{{}}00", "R15C{}_VPTX0{{}}00"], [tilepos[1]]),
13+
net_product(["R6C{}_VPTX0{{}}00", "R16C{}_VPTX0{{}}00"], [tilepos[1]]),
1414
glb_ids))
1515

1616
# Phantom DCCs- First fill in "T"/"B", and then global id
@@ -27,7 +27,9 @@ def flatten_nets(tilepos):
2727

2828
jobs = [
2929
(FuzzConfig(job="CIB_EBR0_END1_UPDOWN", family="MachXO3", device="LCMXO3LF-4300C", ncl="tap.ncl",
30-
tiles=["CIB_R11C1:CIB_EBR0_END1"]), flatten_nets((11,1)))
30+
tiles=["CIB_R11C1:CIB_EBR0_END1"]), flatten_nets((11,1))),
31+
(FuzzConfig(job="CIB0_EBR2_END1_UPDOWN", family="MachXO3", device="LCMXO3LF-4300C", ncl="tap.ncl",
32+
tiles=["CIB_R11C32:CIB_EBR2_END1"]), flatten_nets((11,32)))
3133

3234
]
3335

fuzzers/machxo3/022-glb-cib_ebr/6900/fuzzer.py

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ def mk_nets(tilepos, glb_ids):
1010

1111
# Up/Down conns
1212
ud_nets.extend(net_product(
13-
net_product(["R11C{}_VPTX0{{}}00", "R15C{}_VPTX0{{}}00"], [tilepos[1]]),
13+
net_product(["R7C{}_VPTX0{{}}00", "R17C{}_VPTX0{{}}00", "R23C{}_VPTX0{{}}00"], [tilepos[1]]),
1414
glb_ids))
1515

1616
# Phantom DCCs- First fill in "T"/"B", and then global id
@@ -26,6 +26,7 @@ def flatten_nets(tilepos):
2626
return [nets for netpair in [(0, 4), (1, 5), (2, 6), (3, 7)] for nets in mk_nets(tilepos, netpair)]
2727

2828
jobs = [
29+
#0
2930
(FuzzConfig(job="GLB_UPDOWN26", family="MachXO3", device="LCMXO3LF-6900C", ncl="tap.ncl",
3031
tiles=["CIB_R13C10:CIB_EBR0"]), mk_nets((13, 10), (2, 6))),
3132

@@ -38,11 +39,11 @@ def flatten_nets(tilepos):
3839
(FuzzConfig(job="GLB_UPDOWN37", family="MachXO3", device="LCMXO3LF-6900C", ncl="tap.ncl",
3940
tiles=["CIB_R13C7:CIB_EBR0"]), mk_nets((13, 7), (3, 7))),
4041

42+
#4
4143
(FuzzConfig(job="CIB_EBR0_END2_DLL45_UPDOWN", family="MachXO3", device="LCMXO3LF-6900C", ncl="tap.ncl",
4244
tiles=["CIB_R13C1:CIB_EBR0_END2_DLL45"]), flatten_nets((13,1))),
4345
(FuzzConfig(job="CIB_EBR2_END1_UPDOWN", family="MachXO3", device="LCMXO3LF-6900C", ncl="tap.ncl",
4446
tiles=["CIB_R13C41:CIB_EBR2_END1"]), flatten_nets((13,41))),
45-
4647
(FuzzConfig(job="CIB_EBR0_END2_DLL3_UPDOWN", family="MachXO3", device="LCMXO3LF-6900C", ncl="tap.ncl",
4748
tiles=["CIB_R20C1:CIB_EBR0_END2_DLL3"]), flatten_nets((20,1))),
4849
(FuzzConfig(job="CIB_EBR2_END1_SP_UPDOWN", family="MachXO3", device="LCMXO3LF-6900C", ncl="tap.ncl",

fuzzers/machxo3/022-glb-cib_ebr/9400/fuzzer.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ def mk_nets(tilepos, glb_ids):
1010

1111
# Up/Down conns
1212
ud_nets.extend(net_product(
13-
net_product(["R13C{}_VPTX0{{}}00", "R17C{}_VPTX0{{}}00"], [tilepos[1]]),
13+
net_product(["R5C{}_VPTX0{{}}00", "R12C{}_VPTX0{{}}00", "R19C{}_VPTX0{{}}00", "R26C{}_VPTX0{{}}00"], [tilepos[1]]),
1414
glb_ids))
1515

1616
# Phantom DCCs- First fill in "T"/"B", and then global id

libtrellis/include/RoutingGraph.hpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -178,6 +178,7 @@ class RoutingGraph : public IdStore
178178
const MachXO2GlobalsInfo *global_data_machxo2;
179179
enum GlobalType {
180180
CENTER,
181+
SPINE_LEFT_RIGHT,
181182
LEFT_RIGHT,
182183
UP_DOWN,
183184
BRANCH,

libtrellis/src/RoutingGraph.cpp

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -378,6 +378,12 @@ RoutingId RoutingGraph::find_machxo2_global_position(int row, int col, const std
378378
curr_global.loc.y = center.first;
379379
return curr_global;
380380

381+
} else if(strategy == GlobalType::SPINE_LEFT_RIGHT) {
382+
assert(row == spine_1.row || row == spine_2.row);
383+
curr_global.id = ident(db_name);
384+
curr_global.loc.x = center.second;
385+
curr_global.loc.y = row;
386+
return curr_global;
381387
// If we found a global emanating from the CENTER MUX, return a L_/R_
382388
// global net in the center tile based upon the current tile position
383389
// (specifically column).
@@ -582,11 +588,12 @@ RoutingGraph::GlobalType RoutingGraph::get_global_type_from_name(const std::stri
582588
// static const std::regex qsw90(R"(G_DQSW90)", std::regex::optimize);
583589

584590
if(regex_match(db_name, match, global_entry) ||
585-
regex_match(db_name, match, global_left_right) ||
586591
regex_match(db_name, match, center_mux_glb_out) ||
587592
regex_match(db_name, match, cib_out_to_glb) ||
588593
regex_match(db_name, match, dcm_sig)) {
589594
return GlobalType::CENTER;
595+
} else if(regex_match(db_name, match, global_left_right)) {
596+
return GlobalType::SPINE_LEFT_RIGHT;
590597
} else if(regex_match(db_name, match, global_left_right_g)) {
591598
return GlobalType::LEFT_RIGHT;
592599
} else if(regex_match(db_name, match, global_up_down) ||

libtrellis/src/Tile.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ map<pair<int, int>, pair<int, int>> center_map = {
4141
// LCMXO2-4000, LCMXO3-4300
4242
{make_pair(22, 31), make_pair(11, 15)},
4343
// LCMXO2-7000, LCMXO3-6900
44-
{make_pair(27, 40), make_pair(13, 18)},
44+
{make_pair(27, 40), make_pair(17, 18)},
4545
// LCMXO3-9400
4646
{make_pair(31, 48), make_pair(15, 24)},
4747
};

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