AMD/Zen CPPC

[cyring]

Commit 5c22122 in develop branch is introducing CPPC for AMD Zen processors.

• Implementation is based on MSR registers specification revealed in kernel patches
• No ACPI involved
• AMD CPPC operations are routed through the previous Intel/HWP implementation

• The CPPC CPUID capability is shown in the Features window
• CPPC can be enabled from the Performance Monitoring window, item HWP.
  This is a write-once operation, and same as Intel/HWP, a reboot is required to disable CPPC
• Once CPPC enabled, will appear the Capabilities ratios:
  Lowest Efficient Guaranteed Highest
  Unlike Intel/HWP, those capabilities are not P-states but rather some performance hints between 0 and 255.
  I have thus scaled them to P-state ratios, proportionally to the Max Frequency ratio (non boosted).
• Item HWP EPP, in the Power, Current & Thermal window, allows to modify the Energy Policy. Hint is between 0 and 255.
• In Processor window are displayed the CPPC requested ratios under the section HWP
  Same as capabilities, those are originally hints which are scaled to ratios.
  So far, they are read-only.

Code has been programmed on a Zen2/Lucienne 5300U processor.
I will appreciate your screenshots of testings to figure out the distinct cases among platform firmware.

CyrIng

[cyring]

• Can now alter the Min, Max and TGT CPPC performance hints aka HWP

• Hints are scaled to ratios and vice versa to hints

• Scaling as a function of Turbo Boost activation
  If Boost is enabled then we choose the CPB frequency ratio
  else scaling is based on the Max non boost-frequency ratio.

• Here showing the Max which is increased to the highest performance hint.

[cyring]

• Zen2/Matisse 3950X - ArchLinux 5.16.5
• Bellow, the kernel ACPI implementation of CPPC

ls /sys/devices/system/cpu/cpu0/acpi_cppc/
feedback_ctrs  lowest_nonlinear_perf  nominal_perf
highest_perf   lowest_perf            reference_perf
lowest_freq    nominal_freq           wraparound_time

cat /sys/devices/system/cpu/cpu0/acpi_cppc/highest_perf 
236

echo 254 > /sys/devices/system/cpu/cpu0/acpi_cppc/highest_perf 
bash: /sys/devices/system/cpu/cpu0/acpi_cppc/highest_perf: Permission denied

Ugh! I don't feel like going further with that ACPI firmware. Dream of the same Zen3 MSR for Zen v1 and v2

[cyring]

• Commit 69cf31f : One can alter the CPPC Target and Max frequency through the CoreFreq governor.

[root@Linux ~]# echo "1700000" > /sys/devices/system/cpu/cpufreq/policy7/scaling_setspeed
[root@Linux ~]# echo "1400000" > /sys/devices/system/cpu/cpufreq/policy2/scaling_setspeed

• As a remainder, prerequisites are to register corefreqk.ko to the Kernel CPU-Freq framework:

1. CoreFreq as the Clock Source, CPU Freq and CPU Idle driver
2. Registration

echo "corefreq" > /sys/devices/system/clocksource/clocksource0/current_clocksource

insmod corefreqk.ko Register_ClockSource=1 Register_CPU_Freq=1 Register_Governor=1 Register_CPU_Idle=1

3. The same can be achieved from the UI

[cyring]

• Other example

[root@Linux ~]# echo "1500000" > /sys/devices/system/cpu/cpufreq/policy5/scaling_setspeed
[root@Linux ~]# echo "1100000" > /sys/devices/system/cpu/cpufreq/policy1/scaling_setspeed
[root@Linux ~]# echo "1600000" > /sys/devices/system/cpu/cpufreq/policy6/scaling_setspeed
[root@Linux ~]# echo "400000" > /sys/devices/system/cpu/cpufreq/policy4/scaling_setspeed
[root@Linux ~]# echo "400000" > /sys/devices/system/cpu/cpufreq/policy3/scaling_setspeed
[root@Linux ~]# echo "3800000" > /sys/devices/system/cpu/cpufreq/policy0/scaling_setspeed

• Stress the CPU #000
  From the UI menu Tools > Turbo < Select CPU > > 000

Remarks:

1. CPU #001 is the thread sibling Core of CPU #000; thus its P-State results with the same frequency
2. Press ! to toggle the Absolute frequency display mode
3. Press m to verify the Topology

4. If the Processor is not CPPC capable then writing to scaling_setspeed will fallback to a P-State changed iff the requested P-State frequency exists.

5. It seems the Firmware needs a delay to request the Boosted frequency through CPPC
   EDIT: in battery mode only

[cyring]

For bare-metal testings, all latest CPPC additions are now available in the development image @ cyring.fr

[cyring]

Re-engineering CPPC is the work in progress.

• AMD 3950X Firmware mode has been enabled
• Min, Max, Target frequencies forced limited
• Employing Kernel ACPI Interface, cppc_ functions
• tbc

[cyring]

Commit 5e805c1 is presenting the Work In Progress:

• CPPC can be enabled in ACPI via Kernel api
• Target ratio can be altered

Developments and Tests are made with those Kernel drivers:

• acpi-cpufreq
• amd_pstate
• None Bare-Metal

1. Target ratio was set to 42
   

2. Target ratio was set to 8
   

[cyring]

Commit 3e690a8

• Activating Hardware CPPC

• Lowering performance hint to 5 MHz

[Artoria2e5]

Linux now also includes an AMD CPPC "shared memory" code path for (I guess consumer Zen 2?) CPUs without the "cppc" MSR, but does implement the _CPC thing. It's higher latency but closer to the generic thing.

[cyring]

Indeed, that "firmware" CPPC API is, since, employed by CoreFreq whenever the CONFIG_ACPI_CPPC_LIB directive was found during the driver build.
Unfortunately a state getter function has never been programmed by Kernel; reason why, with my 3950X, the CPPC activation state remains blue in the UI footer bar.

[Nevarro]

I can't get CPPC to turn green, except when I manually enable HWC. What exactly does this change? I can't seem to load the AMD_PSTATE driver (with C-States and CPPC enabled in the BIOS of my B550 Taichi) and even after enabling CPPC in Corefreq, my Ryzen 5 Pro 4750G only goes into C1 in Corefreq.

[Nevarro]

Are you sure it's not "amd_pstate=passive"?

I got it (together with "initcall_blacklist=acpi_cpufreq_init") in my Syslinux Config for boot as well as "modprobe amd_pstate" in my Unraid Go-file. But the driver is not loaded.

Processor                           [AMD Ryzen 7 PRO 4750G with Radeon Graphics]
|- Architecture                                                    [Zen2/Renoir]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x08600109]
|- Signature                                                           [  8F_60]
|- Stepping                                                            [      1]
|- Online CPU                                                          [ 16/ 16]
|- Base Clock                                                          [ 99.812]
|- Frequency            (MHz)                      Ratio                        
                 Min   1397.37                    <  14 >                       
                 Max   3593.24                    <  36 >                       
|- Factory                                                             [100.000]
                       3600                       [  36 ]                       
|- Performance                                                                  
   |- P-State                                                                   
                 TGT   1397.37                    <  14 >                       
|- Turbo Boost                                                         [   LOCK]
                 XFR   4391.73                    [  44 ]                       
                 CPB   4391.73                    [  44 ]                       
                  1C   1696.81                    <  17 >                       
                  2C   1397.37                    <  14 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1596.99                    [  16 ]                       
                 MEM   4790.98                    [  48 ]                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N] 
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNNI [N]  AVX512-ALG [N] 
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [N] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [N]   VPCLMULQDQ [N]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Missing]
|- Fast-String Operation                                        ERMS   [Missing]
|- Fused Multiply Add                                           FMA4   [Missing]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Missing]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Capable]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Missing]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Missing]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [ Enable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [ Enable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [ Unable]
Security Features                                                               
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Capable]
|- SEV - Encrypted State                                      SEV-ES   [Capable]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Missing]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
   |- L2 Prefetcher                                                L2 HW   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [ ON]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [OFF]
   |- Version                                                     [         N/A]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  1]
|- Counters:          General                   Fixed                           
|           {  6,  6,  4 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       <OFF>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- ACPI Processor C-States                                      _CST   [      3]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Global Time Stamp Counter                                           [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      3]
|- Performance Present Capabilities                             _PPC   [      0]
|- Continuous Performance Control                               _CPC   [Missing]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49: 99 C]
|- CPPC Energy Preference                                        EPP   [Capable]
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [   42 W]
   |- Minimum Power                                              Min   [    4 W]
   |- Maximum Power                                              Max   [    1 W]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [  161 W]
|- Electrical Design Current                                     EDC   [   12 A]
|- Thermal Design Current                                        TDC   [  354 A]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]
CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8       512  8 i    8192 16w 
001:  0    2   0  0   1  0      32  8        32  8       512  8 i    8192 16w 
002:  0    4   0  0   2  0      32  8        32  8       512  8 i    8192 16w 
003:  0    6   0  0   3  0      32  8        32  8       512  8 i    8192 16w 
004:  0    8   0  1   4  0      32  8        32  8       512  8 i    8192 16w 
005:  0   10   0  1   5  0      32  8        32  8       512  8 i    8192 16w 
006:  0   12   0  1   6  0      32  8        32  8       512  8 i    8192 16w 
007:  0   14   0  1   7  0      32  8        32  8       512  8 i    8192 16w 
008:  0    1   0  0   0  1      32  8        32  8       512  8 i    8192 16w 
009:  0    3   0  0   1  1      32  8        32  8       512  8 i    8192 16w 
010:  0    5   0  0   2  1      32  8        32  8       512  8 i    8192 16w 
011:  0    7   0  0   3  1      32  8        32  8       512  8 i    8192 16w 
012:  0    9   0  1   4  1      32  8        32  8       512  8 i    8192 16w 
013:  0   11   0  1   5  1      32  8        32  8       512  8 i    8192 16w 
014:  0   13   0  1   6  1      32  8        32  8       512  8 i    8192 16w 
015:  0   15   0  1   7  1      32  8        32  8       512  8 i    8192 16w 
                              Zen UMC  [1448]                              
Controller #0                                                Dual Channel  
 Bus Rate  1600 MHz       Bus Speed 1597 MHz           DDR4 Speed 3194 MT/s
                                                                           
 Cha   CL  RCDr RCDw  RP  RAS   RC  RRDs RRDl FAW  WTRs WTRl  WR  clRR clWW
  #0   22   22   22   22   52   74    4    8   34    4   12   24    5    5 
  #1   22   22   22   22   52   74    4    8   34    4   12   24    5    5 
      CWL  RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
  #0   18   12   12    1    1    7    6    1    5    4    0    0    0    0 
  #1   18   12   12    1    1    7    6    1    5    4    0    0    0    0 
      REFI RFC1 RFC2 RFC4 RCPB RPPB  BGS:Alt  Ban  Page  CKE  CMD  GDM  ECC
  #0 12480  312  192  132   0    0    ON OFF  R1W1   0    8   1T    ON   1 
  #1 12480  312  192  132   0    0    ON OFF  R1W1   0    8   1T    ON   1 
      MRD:PDA   MOD:PDA  WRMPR STAG PDM RDDATA WRD  WRL  RDL  XS   XP CPDED
  #0    8  16    24  24    24    9 0:P:0   17   2   13   26  576   10    4 
  #1    8  16    24  24    24    9 0:P:0   17   2   13   26  576   10    4 
                                                                           
 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    16    2    131072      1024          32768 9965745-039.A00G   
 DIMM Geometry for channel #1                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    16    2    131072      1024          32768 9965745-039.A00G   
Linux:                                                                          
|- Release                                                       [6.1.64-Unraid]
|- Version                 [#1 SMP PREEMPT_DYNAMIC Wed Nov 29 12:48:16 PST 2023]
|- Machine                                                              [x86_64]
Memory:                                                                         
|- Total RAM                                                         65212144 KB
|- Shared RAM                                                          323228 KB
|- Free RAM                                                          35110948 KB
|- Buffer RAM                                                           17644 KB
|- Total High                                                               0 KB
|- Free High                                                                0 KB
Clock Source                                                  <             tsc>
CPU-Freq driver                                               [    acpi-cpufreq]
Governor                                                      [    conservative]
CPU-Idle driver                                               [       acpi_idle]
|- Idle Limit                                                 [              C3]
   |- State        POLL      C1      C2      C3                                 
   |-           CPUIDLE ACPI FF ACPI IO ACPI IO                                 
   |- Power          -1       0       0       0                                 
   |- Latency         0       1      18     350                                 
   |- Residency       0       2      36     700                                 
|- Collaborative Processor Performance Control                  CPPC       <OFF>
   |- Capabilities     Lowest      Efficient     Guaranteed        Highest      
   |- CPU #0       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #1       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #2       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #3       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #4       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #5       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #6       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #7       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #8       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #9       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #10      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #11      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #12      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #13      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #14      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #15      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000    7.95   132  0.7250    0  000000000000000183    0.002792358   0.002792358
001    2.71   132  0.7250   26  000000000000000148    0.002258301   0.002258301
002    3.05   132  0.7250    0  000000000000000155    0.002365112   0.002365112
003    5.95   132  0.7250    0  000000000000000160    0.002441406   0.002441406
004   13.68   132  0.7250    0  000000000000000285    0.004348755   0.004348755
005    7.79   132  0.7250    0  000000000000000165    0.002517700   0.002517700
006    2.42   132  0.7250    0  000000000000000048    0.000732422   0.000732422
007    6.87   132  0.7250    0  000000000000000180    0.002746582   0.002746582
008    1.75   132  0.7250    0  000000000000000000    0.000000000   0.000000000
009    6.14   132  0.7250    0  000000000000000000    0.000000000   0.000000000
010    6.30   132  0.7250    0  000000000000000000    0.000000000   0.000000000
011    3.14   132  0.7250    0  000000000000000000    0.000000000   0.000000000
012    1.54   132  0.7250    0  000000000000000000    0.000000000   0.000000000
013    3.08   132  0.7250    0  000000000000000000    0.000000000   0.000000000
014    1.63   132  0.7250    0  000000000000000000    0.000000000   0.000000000
015    1.83   132  0.7250    0  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J):   6.743041992   0.020202637   1.379516602   0.000000000   0.000000000
Power(W) :   6.743041992   0.020202637   1.379516602   0.000000000   0.000000000

[cyring]

But the driver is not loaded.

Don't you have any failure message in the kernel log ?
Is that AMD module present in lsmod ?

Indeed getting ride of acpi-cpufreq is the key to load amd_pstate

My motherboard requires various ACPI objects to be enabled to get the CPPC firmware version to work; in particular _CPC
See the output from 3950X

[Nevarro]

I don't see any errors in the log. In lsmod there's only acpi_cpufreq present. Also, acpi_cpufreq doesn't seem to be blocked with the boot arguments. It's always loaded. I would expect no driver at all to be loaded. To maybe the problem is about suppressing acpi_cpufreq to be loaded?

Do you have any other ACPI-BIOS settings as an example for me? I can't find many of the BIOS-options proposed for AMD_PSTATE such as XXX. I could only find:

PM L1 SS = L1.1 (also tried L1.1&L1.2)
Global C-state Control = Enabled
CPPC CTRL = Enabled

I can't find CPPC Preferred Cores or Power Supply Idle Control for example.

Btw.: thanks so much for helping me out, even though it's only secondarily related to CoreFreq!

[cyring]

initcall_blacklist=acpi_cpufreq_init is employed when acpi_cpufreq is integrated into kernel whereas modprobe.blacklist=acpi_cpufreq is used when acpi_cpufreq is a kernel module (you can find its name with command lsmod)

You can also add both parameters in your kernel boot config.

[Nevarro]

So, the solution was, to only put amd_pstate=passive into Syslinux config with no other boot arguments. The pstate driver ist now loaded and also Corefreq shows CPPC as green. However, neither Corefreq nor Powertop shows any higher C-states. Powertop shows up to C3, CoreFreq only shows the CPU in Turbo, C0 and C1.

Thanks very much for your help!

[cyring]

@Nevarro

IOMMU, its version, and virtualization are not showing up in your CoreFreq output.
Can you please enable them in your BIOS then post here the output of lspci -nn
I would like to add your IOMMU PCI id in CoreFreq

[cyring]

Please let me know if you can provide them ?

[Nevarro]

I will do so soon. I was just tinkering with the kernel driver to finally get it running. VMs are not really interesting for me, so I haven't activated IOMMU. But I will do so in the next few days to provide you with the information.

[cyring]

No hardware C-State counters known from AMD datasheets; that's why only C1 as the remaining cycles from C0

Although, when registered as the CPU-Idle handler (corefreqk-idle), CoreFreq will compute software idle counters, as low as the kernel is requesting, thus down to C6