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[CIR] Add syncscope support for atomic load operations
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13 files changed

+148
-67
lines changed

13 files changed

+148
-67
lines changed

‎clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -175,8 +175,8 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
175175
return cir::LoadOp::create(*this, loc, ptr, /*isDeref=*/false, isVolatile,
176176
isNontemporal,
177177
/*alignment=*/alignmentAttr,
178-
/*mem_order=*/
179-
cir::MemOrderAttr{},
178+
/*sync_scope=*/cir::SyncScopeKindAttr{},
179+
/*mem_order=*/cir::MemOrderAttr{},
180180
/*tbaa=*/cir::TBAAAttr{});
181181
}
182182

‎clang/include/clang/CIR/Dialect/IR/CIROps.td‎

Lines changed: 21 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -533,6 +533,15 @@ def CIR_MemOrder : CIR_I32EnumAttr<
533533
I32EnumAttrCase<"SequentiallyConsistent", 5, "seq_cst">
534534
]>;
535535

536+
//===----------------------------------------------------------------------===//
537+
// C/C++ sync scope definitions
538+
//===----------------------------------------------------------------------===//
539+
540+
def CIR_SyncScopeKind : CIR_I32EnumAttr<"SyncScopeKind", "memory scope kind", [
541+
I32EnumAttrCase<"SingleThread", 0, "single_thread">,
542+
I32EnumAttrCase<"System", 1, "system">
543+
]>;
544+
536545
//===----------------------------------------------------------------------===//
537546
// AllocaOp
538547
//===----------------------------------------------------------------------===//
@@ -670,7 +679,8 @@ def CIR_LoadOp : CIR_Op<"load", [
670679
%4 = cir.load volatile %0 : !cir.ptr<i32>, i32
671680

672681
// Others
673-
%x = cir.load align(16) atomic(seq_cst) %0 : !cir.ptr<i32>, i32
682+
%x = cir.load align(16) syncscope(single_thread) atomic(seq_cst)
683+
%0 : !cir.ptr<i32>, i32
674684
```
675685
}];
676686

@@ -679,6 +689,7 @@ def CIR_LoadOp : CIR_Op<"load", [
679689
UnitAttr:$is_volatile,
680690
UnitAttr:$is_nontemporal,
681691
OptionalAttr<I64Attr>:$alignment,
692+
OptionalAttr<CIR_SyncScopeKind>:$sync_scope,
682693
OptionalAttr<CIR_MemOrder>:$mem_order,
683694
OptionalAttr<CIR_AnyTBAAAttr>:$tbaa
684695
);
@@ -689,6 +700,7 @@ def CIR_LoadOp : CIR_Op<"load", [
689700
(`volatile` $is_volatile^)?
690701
(`nontemporal` $is_nontemporal^)?
691702
(`align` `(` $alignment^ `)`)?
703+
(`syncscope` `(` $sync_scope^ `)`)?
692704
(`atomic` `(` $mem_order^ `)`)?
693705
$addr `:` qualified(type($addr)) `,` type($result) attr-dict
694706
(`tbaa` `(` $tbaa^ `)`)?
@@ -698,7 +710,8 @@ def CIR_LoadOp : CIR_Op<"load", [
698710
// TODO(CIR): The final interface here should include an argument for the
699711
// SyncScope::ID.
700712
// This should be used over the ODS generated setMemOrder.
701-
void setAtomic(cir::MemOrder order);
713+
void setAtomic(cir::MemOrder order,
714+
cir::SyncScopeKind scope);
702715
}];
703716

704717
// FIXME: add verifier.
@@ -6094,11 +6107,6 @@ def CIR_AtomicXchg : CIR_Op<"atomic.xchg", [
60946107
let hasVerifier = 1;
60956108
}
60966109

6097-
def CIR_MemScopeKind : CIR_I32EnumAttr<"MemScopeKind", "memory scope kind", [
6098-
I32EnumAttrCase<"SingleThread", 0, "single_thread">,
6099-
I32EnumAttrCase<"System", 1, "system">
6100-
]>;
6101-
61026110
def CIR_AtomicCmpXchg : CIR_Op<"atomic.cmp_xchg", [
61036111
AllTypesMatch<["old", "expected", "desired"]>
61046112
]> {
@@ -6122,7 +6130,7 @@ def CIR_AtomicCmpXchg : CIR_Op<"atomic.cmp_xchg", [
61226130
CIR_AnyType:$desired,
61236131
Arg<CIR_MemOrder, "success memory order">:$succ_order,
61246132
Arg<CIR_MemOrder, "failure memory order">:$fail_order,
6125-
OptionalAttr<CIR_MemScopeKind>:$syncscope,
6133+
OptionalAttr<CIR_SyncScopeKind>:$sync_scope,
61266134
OptionalAttr<I64Attr>:$alignment,
61276135
UnitAttr:$weak,
61286136
UnitAttr:$is_volatile);
@@ -6135,7 +6143,7 @@ def CIR_AtomicCmpXchg : CIR_Op<"atomic.cmp_xchg", [
61356143
`success` `=` $succ_order `,`
61366144
`failure` `=` $fail_order
61376145
`)`
6138-
(`syncscope` `(` $syncscope^ `)`)?
6146+
(`syncscope` `(` $sync_scope^ `)`)?
61396147
(`align` `(` $alignment^ `)`)?
61406148
(`weak` $weak^)?
61416149
(`volatile` $is_volatile^)?
@@ -6165,7 +6173,7 @@ def CIR_AtomicTestAndSetOp : CIR_Op<"atomic.test_and_set"> {
61656173
let arguments = (ins
61666174
Arg<CIR_PtrToType<CIR_SInt8>, "", [MemRead, MemWrite]>:$ptr,
61676175
Arg<CIR_MemOrder, "memory order">:$mem_order,
6168-
OptionalAttr<CIR_MemScopeKind>:$syncscope,
6176+
OptionalAttr<CIR_SyncScopeKind>:$sync_scope,
61696177
OptionalAttr<I64Attr>:$alignment,
61706178
UnitAttr:$is_volatile);
61716179

@@ -6196,7 +6204,7 @@ def CIR_AtomicClearOp : CIR_Op<"atomic.clear"> {
61966204
let arguments = (ins
61976205
Arg<CIR_PtrToType<CIR_SInt8>, "", [MemRead, MemWrite]>:$ptr,
61986206
Arg<CIR_MemOrder, "memory order">:$mem_order,
6199-
OptionalAttr<CIR_MemScopeKind>:$syncscope,
6207+
OptionalAttr<CIR_SyncScopeKind>:$sync_scope,
62006208
OptionalAttr<I64Attr>:$alignment,
62016209
UnitAttr:$is_volatile);
62026210

@@ -6230,11 +6238,11 @@ def CIR_AtomicFence : CIR_Op<"atomic.fence"> {
62306238

62316239
let arguments = (ins
62326240
Arg<CIR_MemOrder, "memory order">:$ordering,
6233-
OptionalAttr<CIR_MemScopeKind>:$syncscope
6241+
OptionalAttr<CIR_SyncScopeKind>:$sync_scope
62346242
);
62356243

62366244
let assemblyFormat = [{
6237-
(`syncscope` `(` $syncscope^ `)`)? $ordering attr-dict
6245+
(`syncscope` `(` $sync_scope^ `)`)? $ordering attr-dict
62386246
}];
62396247
}
62406248

‎clang/lib/CIR/CodeGen/CIRGenAtomic.cpp‎

Lines changed: 28 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include "CIRGenOpenMPRuntime.h"
1818
#include "TargetInfo.h"
1919
#include "clang/AST/ASTContext.h"
20+
#include "clang/Basic/SyncScope.h"
2021
#include "clang/CIR/Dialect/IR/CIRAttrs.h"
2122
#include "clang/CIR/Dialect/IR/CIRDataLayout.h"
2223
#include "clang/CIR/Dialect/IR/CIRDialect.h"
@@ -350,6 +351,20 @@ static cir::IntAttr extractIntAttr(mlir::Value v) {
350351
return {};
351352
}
352353

354+
// Maps SyncScope::SingleScope to SyncScopeKind::SingleThread,
355+
// SyncScope::SystemScope to SyncScopeKind::System,
356+
// and asserts (llvm_unreachable) for anything else.
357+
static cir::SyncScopeKind convertSyncScopeToCIR(clang::SyncScope scope) {
358+
switch (scope) {
359+
case clang::SyncScope::SingleScope:
360+
return cir::SyncScopeKind::SingleThread;
361+
case clang::SyncScope::SystemScope:
362+
return cir::SyncScopeKind::System;
363+
default:
364+
llvm_unreachable("NYI");
365+
}
366+
}
367+
353368
// Inspect a value that is the strong/weak flag for a compare-exchange. If it
354369
// is a constant of intergral or boolean type, set `val` to the constant's
355370
// boolean value and return true. Otherwise leave `val` unchanged and return
@@ -418,7 +433,7 @@ static void emitAtomicCmpXchg(CIRGenFunction &CGF, AtomicExpr *E, bool IsWeak,
418433
Address Val2, uint64_t Size,
419434
cir::MemOrder SuccessOrder,
420435
cir::MemOrder FailureOrder,
421-
cir::MemScopeKind Scope) {
436+
cir::SyncScopeKind Scope) {
422437
auto &builder = CGF.getBuilder();
423438
auto loc = CGF.getLoc(E->getSourceRange());
424439
auto Expected = builder.createLoad(loc, Val1);
@@ -428,7 +443,7 @@ static void emitAtomicCmpXchg(CIRGenFunction &CGF, AtomicExpr *E, bool IsWeak,
428443
builder, loc, Expected.getType(), boolTy, Ptr.getPointer(), Expected,
429444
Desired, cir::MemOrderAttr::get(&CGF.getMLIRContext(), SuccessOrder),
430445
cir::MemOrderAttr::get(&CGF.getMLIRContext(), FailureOrder),
431-
cir::MemScopeKindAttr::get(&CGF.getMLIRContext(), Scope),
446+
cir::SyncScopeKindAttr::get(&CGF.getMLIRContext(), Scope),
432447
builder.getI64IntegerAttr(Ptr.getAlignment().getAsAlign().value()));
433448
cmpxchg.setIsVolatile(E->isVolatile());
434449
cmpxchg.setWeak(IsWeak);
@@ -456,7 +471,7 @@ static void emitAtomicCmpXchg(CIRGenFunction &CGF, AtomicExpr *E, bool IsWeak,
456471
static void emitAtomicCmpXchgFailureSet(
457472
CIRGenFunction &CGF, AtomicExpr *E, bool IsWeak, Address Dest, Address Ptr,
458473
Address Val1, Address Val2, mlir::Value FailureOrderVal, uint64_t Size,
459-
cir::MemOrder SuccessOrder, cir::MemScopeKind Scope) {
474+
cir::MemOrder SuccessOrder, cir::SyncScopeKind Scope) {
460475

461476
cir::MemOrder FailureOrder;
462477
if (auto ordAttr = extractIntAttr(FailureOrderVal)) {
@@ -546,7 +561,7 @@ static void emitAtomicOp(CIRGenFunction &CGF, AtomicExpr *E, Address Dest,
546561
Address Ptr, Address Val1, Address Val2,
547562
mlir::Value IsWeak, mlir::Value FailureOrder,
548563
uint64_t Size, cir::MemOrder Order,
549-
cir::MemScopeKind Scope) {
564+
cir::SyncScopeKind Scope) {
550565
assert(!cir::MissingFeatures::syncScopeID());
551566
StringRef Op;
552567

@@ -594,9 +609,7 @@ static void emitAtomicOp(CIRGenFunction &CGF, AtomicExpr *E, Address Dest,
594609
case AtomicExpr::AO__scoped_atomic_load_n:
595610
case AtomicExpr::AO__scoped_atomic_load: {
596611
auto load = builder.createLoad(loc, Ptr);
597-
// FIXME(cir): add scope information.
598-
assert(!cir::MissingFeatures::syncScopeID());
599-
load.setMemOrder(Order);
612+
load.setAtomic(Order, Scope);
600613
load.setIsVolatile(E->isVolatile());
601614

602615
// TODO(cir): this logic should be part of createStore, but doing so
@@ -748,7 +761,7 @@ static void emitAtomicOp(CIRGenFunction &CGF, AtomicExpr *E, Address Dest,
748761
case AtomicExpr::AO__atomic_test_and_set: {
749762
auto op = cir::AtomicTestAndSetOp::create(
750763
builder, loc, Ptr.getPointer(), Order,
751-
cir::MemScopeKindAttr::get(&CGF.getMLIRContext(), Scope),
764+
cir::SyncScopeKindAttr::get(&CGF.getMLIRContext(), Scope),
752765
builder.getI64IntegerAttr(Ptr.getAlignment().getQuantity()),
753766
E->isVolatile());
754767
builder.createStore(loc, op, Dest);
@@ -758,7 +771,7 @@ static void emitAtomicOp(CIRGenFunction &CGF, AtomicExpr *E, Address Dest,
758771
case AtomicExpr::AO__atomic_clear: {
759772
cir::AtomicClearOp::create(
760773
builder, loc, Ptr.getPointer(), Order,
761-
cir::MemScopeKindAttr::get(&CGF.getMLIRContext(), Scope),
774+
cir::SyncScopeKindAttr::get(&CGF.getMLIRContext(), Scope),
762775
builder.getI64IntegerAttr(Ptr.getAlignment().getQuantity()),
763776
E->isVolatile());
764777
return;
@@ -813,14 +826,17 @@ static void emitAtomicOp(CIRGenFunction &CGF, AtomicExpr *Expr, Address Dest,
813826
if (!ScopeModel) {
814827
assert(!cir::MissingFeatures::syncScopeID());
815828
emitAtomicOp(CGF, Expr, Dest, Ptr, Val1, Val2, IsWeak, FailureOrder, Size,
816-
Order, cir::MemScopeKind::System);
829+
Order, cir::SyncScopeKind::System);
817830
return;
818831
}
819832

820833
// Handle constant scope.
821-
if (extractIntAttr(Scope)) {
834+
if (auto scopeAttr = extractIntAttr(Scope)) {
822835
assert(!cir::MissingFeatures::syncScopeID());
823-
llvm_unreachable("NYI");
836+
auto mappedScope =
837+
convertSyncScopeToCIR(ScopeModel->map(scopeAttr.getUInt()));
838+
emitAtomicOp(CGF, Expr, Dest, Ptr, Val1, Val2, IsWeak, FailureOrder, Size,
839+
Order, mappedScope);
824840
return;
825841
}
826842

‎clang/lib/CIR/CodeGen/CIRGenBuilder.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -870,6 +870,7 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
870870
return cir::LoadOp::create(
871871
*this, loc, addr.getElementType(), addr.getPointer(), /*isDeref=*/false,
872872
/*is_volatile=*/isVolatile, /*is_nontemporal=*/isNontemporal, align,
873+
/*sync_scope=*/cir::SyncScopeKindAttr{},
873874
/*mem_order=*/cir::MemOrderAttr{}, /*tbaa=*/cir::TBAAAttr{});
874875
}
875876

‎clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -370,15 +370,15 @@ static mlir::Value makeAtomicCmpXchgValue(CIRGenFunction &cgf,
370370
cir::MemOrder::SequentiallyConsistent),
371371
MemOrderAttr::get(&cgf.getMLIRContext(),
372372
cir::MemOrder::SequentiallyConsistent),
373-
MemScopeKindAttr::get(&cgf.getMLIRContext(), cir::MemScopeKind::System),
373+
SyncScopeKindAttr::get(&cgf.getMLIRContext(), cir::SyncScopeKind::System),
374374
builder.getI64IntegerAttr(destAddr.getAlignment().getAsAlign().value()));
375375

376376
return returnBool ? op.getResult(1) : op.getResult(0);
377377
}
378378

379379
static mlir::Value makeAtomicFenceValue(CIRGenFunction &cgf,
380380
const CallExpr *expr,
381-
cir::MemScopeKind syncScope) {
381+
cir::SyncScopeKind syncScope) {
382382
auto &builder = cgf.getBuilder();
383383
mlir::Value orderingVal = cgf.emitScalarExpr(expr->getArg(0));
384384

@@ -392,7 +392,7 @@ static mlir::Value makeAtomicFenceValue(CIRGenFunction &cgf,
392392

393393
cir::AtomicFence::create(
394394
builder, cgf.getLoc(expr->getSourceRange()), ordering,
395-
MemScopeKindAttr::get(&cgf.getMLIRContext(), syncScope));
395+
SyncScopeKindAttr::get(&cgf.getMLIRContext(), syncScope));
396396
}
397397

398398
return mlir::Value();
@@ -2155,10 +2155,10 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
21552155

21562156
case Builtin::BI__atomic_thread_fence:
21572157
return RValue::get(
2158-
makeAtomicFenceValue(*this, E, cir::MemScopeKind::System));
2158+
makeAtomicFenceValue(*this, E, cir::SyncScopeKind::System));
21592159
case Builtin::BI__atomic_signal_fence:
21602160
return RValue::get(
2161-
makeAtomicFenceValue(*this, E, cir::MemScopeKind::SingleThread));
2161+
makeAtomicFenceValue(*this, E, cir::SyncScopeKind::SingleThread));
21622162
case Builtin::BI__c11_atomic_thread_fence:
21632163
case Builtin::BI__c11_atomic_signal_fence:
21642164
llvm_unreachable("BI__c11_atomic_thread_fence like NYI");

‎clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
1818
#include "CIRGenFunction.h"
1919
#include "CIRGenModule.h"
2020
#include "TargetInfo.h"
21+
#include "clang/CIR/Dialect/IR/CIROpsEnums.h"
2122
#include "clang/CIR/MissingFeatures.h"
2223

2324
// TODO(cir): once all builtins are covered, decide whether we still
@@ -4489,7 +4490,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
44894490
case NEON::BI__builtin_neon_vldap1q_lane_s64: {
44904491
cir::LoadOp Load = builder.createAlignedLoad(
44914492
Ops[0].getLoc(), vTy.getElementType(), Ops[0], PtrOp0.getAlignment());
4492-
Load.setAtomic(cir::MemOrder::Acquire);
4493+
Load.setAtomic(cir::MemOrder::Acquire, cir::SyncScopeKind::System);
44934494
return cir::VecInsertOp::create(builder, getLoc(E->getExprLoc()),
44944495
builder.createBitcast(Ops[1], vTy), Load,
44954496
Ops[2]);

‎clang/lib/CIR/Dialect/IR/CIRDialect.cpp‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1013,12 +1013,9 @@ LogicalResult cir::ComplexImagPtrOp::verify() {
10131013
// LoadOp
10141014
//===----------------------------------------------------------------------===//
10151015

1016-
// TODO(CIR): The final interface here should include an argument for the
1017-
// SyncScope::ID.
1018-
void cir::LoadOp::setAtomic(cir::MemOrder order) {
1016+
void cir::LoadOp::setAtomic(cir::MemOrder order, cir::SyncScopeKind scope) {
10191017
setMemOrder(order);
1020-
if (cir::MissingFeatures::syncScopeID())
1021-
llvm_unreachable("NYI");
1018+
setSyncScope(scope);
10221019
}
10231020

10241021
//===----------------------------------------------------------------------===//

‎clang/lib/CIR/Dialect/Transforms/TargetLowering/ItaniumCXXABI.cpp‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -386,7 +386,9 @@ void ItaniumCXXABI::lowerGetMethod(
386386
rewriter, op.getLoc(), vtablePtrPtr, /*isDeref=*/false,
387387
/*isVolatile=*/false,
388388
/*isNontemporal=*/false,
389-
/*alignment=*/mlir::IntegerAttr(), /*mem_order=*/cir::MemOrderAttr(),
389+
/*alignment=*/mlir::IntegerAttr(),
390+
/*sync_scope=*/cir::SyncScopeKindAttr{},
391+
/*mem_order=*/cir::MemOrderAttr(),
390392
/*tbaa=*/mlir::ArrayAttr());
391393

392394
// Get the vtable offset.
@@ -421,6 +423,7 @@ void ItaniumCXXABI::lowerGetMethod(
421423
/*isDeref=*/false, /*isVolatile=*/false,
422424
/*isNontemporal=*/false,
423425
/*alignment=*/mlir::IntegerAttr(),
426+
/*sync_scope=*/cir::SyncScopeKindAttr{},
424427
/*mem_order=*/cir::MemOrderAttr(),
425428
/*tbaa=*/mlir::ArrayAttr());
426429
}

‎clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp‎

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -423,9 +423,9 @@ static mlir::Value emitToMemory(mlir::ConversionPatternRewriter &rewriter,
423423
}
424424

425425
std::optional<llvm::StringRef>
426-
getLLVMSyncScope(std::optional<cir::MemScopeKind> syncScope) {
426+
getLLVMSyncScope(std::optional<cir::SyncScopeKind> syncScope) {
427427
if (syncScope.has_value())
428-
return syncScope.value() == cir::MemScopeKind::SingleThread ? "singlethread"
428+
return syncScope.value() == cir::SyncScopeKind::SingleThread ? "singlethread"
429429
: "";
430430
return std::nullopt;
431431
}
@@ -1829,11 +1829,13 @@ mlir::LogicalResult CIRToLLVMLoadOpLowering::matchAndRewrite(
18291829
invariant = isLoadOrStoreInvariant(op.getAddr());
18301830

18311831
// TODO: nontemporal, syncscope.
1832+
auto syncScope = getLLVMSyncScope(op.getSyncScope());
18321833
auto newLoad = mlir::LLVM::LoadOp::create(
18331834
rewriter, op->getLoc(), llvmTy, adaptor.getAddr(),
1834-
/* alignment */ alignment, op.getIsVolatile(),
1835-
/* nontemporal */ op.getIsNontemporal(),
1836-
/* invariant */ false, /* invariantGroup */ invariant, ordering);
1835+
/*alignment*/ alignment, op.getIsVolatile(),
1836+
/*nontemporal*/ op.getIsNontemporal(),
1837+
/*invariant*/ false, /*invariantGroup*/ invariant, ordering,
1838+
/*syncscope=*/ syncScope.value_or(StringRef()));
18371839

18381840
// Convert adapted result to its original type if needed.
18391841
mlir::Value result =
@@ -3499,7 +3501,7 @@ mlir::LogicalResult CIRToLLVMAtomicCmpXchgLowering::matchAndRewrite(
34993501
rewriter, op.getLoc(), adaptor.getPtr(), expected, desired,
35003502
getLLVMAtomicOrder(adaptor.getSuccOrder()),
35013503
getLLVMAtomicOrder(adaptor.getFailOrder()));
3502-
cmpxchg.setSyncscope(getLLVMSyncScope(adaptor.getSyncscope()));
3504+
cmpxchg.setSyncscope(getLLVMSyncScope(adaptor.getSyncScope()));
35033505
cmpxchg.setAlignment(adaptor.getAlignment());
35043506
cmpxchg.setWeak(adaptor.getWeak());
35053507
cmpxchg.setVolatile_(adaptor.getIsVolatile());
@@ -3666,7 +3668,7 @@ mlir::LogicalResult CIRToLLVMAtomicTestAndSetOpLowering::matchAndRewrite(
36663668
mlir::ConversionPatternRewriter &rewriter) const {
36673669
mlir::LLVM::AtomicOrdering llvmOrder = getLLVMAtomicOrder(op.getMemOrder());
36683670
llvm::StringRef llvmSyncScope =
3669-
getLLVMSyncScope(adaptor.getSyncscope()).value_or(StringRef());
3671+
getLLVMSyncScope(adaptor.getSyncScope()).value_or(StringRef());
36703672

36713673
auto one = mlir::LLVM::ConstantOp::create(rewriter, op.getLoc(),
36723674
rewriter.getI8Type(), 1);
@@ -3702,7 +3704,7 @@ mlir::LogicalResult CIRToLLVMAtomicFenceLowering::matchAndRewrite(
37023704
auto llvmOrder = getLLVMAtomicOrder(adaptor.getOrdering());
37033705

37043706
auto fence = mlir::LLVM::FenceOp::create(rewriter, op.getLoc(), llvmOrder);
3705-
fence.setSyncscope(getLLVMSyncScope(adaptor.getSyncscope()));
3707+
fence.setSyncscope(getLLVMSyncScope(adaptor.getSyncScope()));
37063708

37073709
rewriter.replaceOp(op, fence);
37083710

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