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fix(spi_flash): Resolve protocol errors and write verification bug
This commit improves the robustness and protocol compliance of the SPI flash driver by resolving critical bugs and standardizing command sequences. Key Changes: 1. **Write Verification Bug (spi_flash_write_sb):** * Replaced the complex bitwise verification logic with a direct comparison (`verify == buf[j]`) for robust data validation. 2. **Protocol Violations & Performance:** * **spi_flash_probe:** Fixed silent protocol failure by adding mandatory `WREN` before `WRSR` and adding explicit `wait_busy()` and `WRDI`. * **spi_flash_write_page:** Removed redundant `wait_busy()` after `WREN` to improve performance. * **Erase Functions:** Standardized erase flow by ensuring an explicit `wait_busy()` is performed after `WREN` before issuing the command. These changes prevent silent failures, potential flash corruption, and unnecessary latency. Signed-off-by: Badr Bacem KAABIA <[email protected]>
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src/spi_flash.c

Lines changed: 18 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -122,8 +122,6 @@ static int RAMFUNCTION spi_flash_write_page(uint32_t address, const void *data,
122122
while (len > 0) {
123123
wait_busy();
124124
flash_write_enable();
125-
wait_busy();
126-
127125
spi_cs_on(SPI_CS_PIO_BASE, SPI_CS_FLASH);
128126
spi_write(BYTE_WRITE);
129127
spi_read();
@@ -159,15 +157,23 @@ static int RAMFUNCTION spi_flash_write_sb(uint32_t address, const void *data, in
159157
spi_read();
160158
spi_cs_off(SPI_CS_PIO_BASE, SPI_CS_FLASH);
161159
wait_busy();
160+
162161
spi_flash_read(address, &verify, 1);
163-
if ((verify & ~(buf[j])) == 0) {
164-
if (verify != buf[j])
165-
return -1;
162+
/* Check if the read value matches the written value */
163+
if (verify == buf[j]) {
166164
j++;
167165
len--;
168166
address++;
169167
}
170-
wait_busy();
168+
else {
169+
/* Verification failed, return error */
170+
wolfBoot_printf(
171+
"SPI SB write verification failed at addr 0x%x. Wrote 0x%x, Read 0x%x\n",
172+
address,
173+
buf[j],
174+
verify);
175+
return -1;
176+
}
171177
}
172178
return 0;
173179
}
@@ -195,12 +201,16 @@ uint16_t spi_flash_probe(void)
195201
chip_write_mode = WB_WRITEPAGE;
196202

197203
#ifndef READONLY
204+
wait_busy();
205+
flash_write_enable()
198206
spi_cs_on(SPI_CS_PIO_BASE, SPI_CS_FLASH);
199207
spi_write(WRSR);
200208
spi_read();
201209
spi_write(0x00);
202210
spi_read();
203211
spi_cs_off(SPI_CS_PIO_BASE, SPI_CS_FLASH);
212+
wait_busy();
213+
flash_write_disable();
204214
#endif
205215

206216
wolfBoot_printf("SPI Probe: Manuf 0x%x, Product 0x%x\n", manuf, product);
@@ -224,6 +234,7 @@ int RAMFUNCTION spi_flash_sector_erase(uint32_t address)
224234

225235
wait_busy();
226236
flash_write_enable();
237+
wait_busy();
227238
spi_cs_on(SPI_CS_PIO_BASE, SPI_CS_FLASH);
228239
spi_write(SECTOR_ERASE);
229240
spi_read();
@@ -237,6 +248,7 @@ int RAMFUNCTION spi_flash_chip_erase(void)
237248
{
238249
wait_busy();
239250
flash_write_enable();
251+
wait_busy();
240252
spi_cs_on(SPI_CS_PIO_BASE, SPI_CS_FLASH);
241253
spi_write(CHIP_ERASE);
242254
spi_read();

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