arch/riscv64.sh: Disable emitting fence.tso on GCC 15+ #71
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Icenowy
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GCC 15 introduces a new compiler flag, `-m{,no-}fence-tso`, to control
the usage of `fence.tso` instruction (which is not supported on some old
T-Head cores, such as the ones used on TH1520/SG2042). When it's
disabled, more strong `fence rw,rw` is emitted and correctness is
then not affected.
Disable emitting this instruction now, because all buildbots of riscv64
are currently SG2042, and no CPU cores are known to benefit from
`fence.tso` yet.
Signed-off-by: Icenowy Zheng <[email protected]>
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GCC 15 introduces a new compiler flag,
-m{,no-}fence-tso, to control the usage offence.tsoinstruction (which is not supported on some old T-Head cores, such as the ones used on TH1520/SG2042). When it's disabled, more strongfence rw,rwis emitted and correctness is then not affected.Disable emitting this instruction now, because all buildbots of riscv64 are currently SG2042, and no CPU cores are known to benefit from
fence.tsoyet.==================
cc @RevySR