Use integer promotion for warp_reduce
#6819
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We can leverage integer promotion to use the `__reduce_meow_sync` instructions
| inline constexpr bool | ||
| can_use_reduce_add_sync<T, ::cuda::std::plus<>, ::cuda::std::void_t<decltype(__reduce_add_sync(0xFFFFFFFF, T{}))>> = | ||
| ::cuda::std::is_integral_v<T> && sizeof(T) <= sizeof(unsigned); |
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Q: what is the decltype(__reduce_add_sync(0xFFFFFFFF, T{})) actually good for? We know that it can only be a max 32-bit integral, we needn't to test the invocability
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I believe that is meant for compiler / toolkit combinations where we cannot rely solely on SM_PROVIDES_SM_80
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Or better said, there are compiler where __reduce_min_sync and friends might not be implemented but that have partial SM80 support
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decltype(__reduce_add_sync) is a historical way to handle this function. The common NV_IF_TARGET works perfectly fine with all compilers
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SFINAE here is very verbose and adds compilation complexity
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Or better said, there are compiler where
__reduce_min_syncand friends might not be implemented but that have partial SM80 support
But I don't think SFINAE would help with this, the function forward declared in ${CTK_INCLUDE}/crt/sm_80_rt.h, which is always included when compiling for arch 80+
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| NVBENCH_BENCH_TYPES(warp_reduce, NVBENCH_TYPE_AXES(value_types)).set_name("warp_reduce").set_type_axes_names({"T{ct}"}); | ||
| NVBENCH_BENCH_TYPES(warp_reduce, NVBENCH_TYPE_AXES(value_types)).set_name(bench_name).set_type_axes_names({"T{ct}"}); |
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Suggestion: benchmarks are typically called base to distinguish them from the tuning variants.
| NVBENCH_BENCH_TYPES(warp_reduce, NVBENCH_TYPE_AXES(value_types)).set_name(bench_name).set_type_axes_names({"T{ct}"}); | |
| NVBENCH_BENCH_TYPES(warp_reduce, NVBENCH_TYPE_AXES(value_types)).set_name("base").set_type_axes_names({"T{ct}"}); |
| constexpr auto bench_name = "warp_reduce_min"; | ||
| using op_t = ::cuda::minimum<>; | ||
| #include "warp_reduce_base.cuh" |
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Remark: There is usually no need to specify a bench name, since the file name is used for the binary.
| return static_cast<T>(__reduce_and_sync(member_mask, static_cast<PromotedT>(input))); | ||
| } | ||
| else if constexpr (detail::can_use_reduce_or_sync<T, ReductionOp>) | ||
| { | ||
| return __reduce_or_sync(member_mask, input); | ||
| return static_cast<T>(__reduce_or_sync(member_mask, static_cast<PromotedT>(input))); | ||
| } | ||
| else if constexpr (detail::can_use_reduce_xor_sync<T, ReductionOp>) | ||
| { | ||
| return __reduce_xor_sync(member_mask, input); | ||
| return static_cast<T>(__reduce_xor_sync(member_mask, static_cast<PromotedT>(input))); |
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We could use the builtins for bitwise operations even for 64 and 128 bit types, maybe it could work also for min/max
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We can leverage integer promotion to use the
__reduce_meow_syncinstructionsWith that we get a lot of shuffle instructions turned into reduce instructions
-[ ] Merge after #6814