fsm_detect: add adff detection #5472
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mmicko
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Nov 12, 2025
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mmicko
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Changes in fsm_detect are looking fine. However think it would be nice to cleanup/improve test cases.
Since 2nd and 3rd test case have generated reset, there is no need to expose it with inout wire reset. Also 3rd test case have reset_test signal driven from both always blocks, and read_verilog will not give error on this, but Verific errors out, can you propose cleaner test for this case ?
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Asking here since the people involved are probably the most up-to-date ones on FSM in Yosys: do we have detection of FSM with resets due to any of the recent changes? |
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What are the reasons/motivation for this change?
5246
Explain how this is achieved.
This code checks if arst signal of fsm's state register depends on it being in invalid state.