v2: XTF on arm

INSTALL

@@ -2,6 +2,28 @@ Xen Test Framework
 
 Build requirements:
  - GNU Make >= 3.81
+
+For x86:
  - GNU compatible compiler, capable of:
    -std=gnu99
    -m64 and -m32
+
+For arm64/arm32:
+- when cross-compiling:
+ - GNU compatible cross-compiler toolchain for Aarch64/Aarch32
+- when building natively:
+ - GNU compatible toolchain for Aarch64/Aarch32
+
+By default ARCH is set to the host architecture where make is executed,
+provided that it is supported by XTF.
+In order to perform cross compilation, ARCH needs to be set to the target
+architecture (when invoking make) e.g. ARCH=x86, together with specifying
+cross compiler prefix e.g. CROSS_COMPILE=x86_64-linux-gnu-.
+
+To build XTF:
+-for x86:
+make ARCH=x86 CROSS_COMPILE=<cross_compiler_prefix>
+-for arm64:
+make ARCH=arm64 CROSS_COMPILE=<cross_compiler_prefix>
+-for arm32:
+make ARCH=arm32 CROSS_COMPILE=<cross_compiler_prefix>

Makefile

@@ -1,6 +1,5 @@
 MAKEFLAGS += -rR
 ROOT := $(abspath $(CURDIR))
-export ROOT
 
 # Default to the all rule
 all:
@@ -25,7 +24,37 @@ endif
 
 xtftestdir := $(xtfdir)/tests
 
-export DESTDIR xtfdir xtftestdir
+# Supported architectures
+SUPPORTED_ARCH := x86 arm64 arm32
+
+# By default ARCH is set to the host architecture where make is executed,
+# provided that it is supported by XTF.
+# In order to perform cross compilation, ARCH needs to be set to the target
+# architecture (when invoking make) e.g. ARCH=x86, together with specifying
+# cross compiler prefix e.g. CROSS_COMPILE=x86_64-linux-gnu-.
+
+# Read machine hardware name using 'uname -m' and try to match it with the list
+# of architectures passed as the first argument (space separated).
+match-arch = $(shell echo $(1) | grep -w -q $(shell uname -m 2>/dev/null || \
+             echo none) && echo y || echo n)
+
+# Set ARCH to the host architecture
+ifeq ($(call match-arch, x86_64 i386),y)
+ARCH ?= x86
+else ifeq ($(call match-arch, aarch64 arm64),y)
+ARCH ?= arm64
+else ifeq ($(call match-arch, arm arm32),y)
+ARCH ?= arm32
+else
+ARCH ?= none
+endif
+
+# Check if specified architecture is supported
+ifeq ($(filter $(ARCH),$(SUPPORTED_ARCH)),)
+$(error Architecture '$(ARCH)' not supported)
+endif
+
+export ROOT DESTDIR ARCH xtfdir xtftestdir
 
 ifeq ($(LLVM),) # GCC toolchain
 CC              := $(CROSS_COMPILE)gcc
@@ -56,6 +85,10 @@ PYTHON             ?= $(PYTHON_INTERPRETER)
 
 export CC LD CPP INSTALL INSTALL_DATA INSTALL_DIR INSTALL_PROGRAM OBJCOPY PYTHON
 
+# Some tests are architecture specific. In this case we can have a list of tests
+# supported by a given architecture in $(ROOT)/build/$(ARCH)/arch-tests.mk.
+-include $(ROOT)/build/$(ARCH)/arch-tests.mk
+
 # By default enable all the tests
 TESTS ?= $(wildcard $(ROOT)/tests/*)
 

README

@@ -9,12 +9,18 @@ Tests for more generic areas are build multiple times into different
 microkernels, to test the same functionality from different types of virtual
 machine.
 
+Currently there are 3 architectures available: x86, arm64 and arm32 although
+only x86 is truly supported. Initial support for arm64 and arm32 is added
+allowing to run a startup code based on the test: tests/example.
+This creates a base for future implementation.
+
 ## The framework consists of:
 
 * PV and HVM, 32 and 64 bit entry points
 * Hypercall interface
 * PV console driver (output)
 * Common reporting framework
+* Initial support for arm64/arm32 (startup code running)
 
 ## TODO List:
 

arch/arm/arm32/head.S

@@ -0,0 +1,61 @@
+#include <arch/page.h>
+#include <xtf/asm_macros.h>
+#include <xen/xen.h>
+
+#define ZIMAGE_MAGIC_NUMBER 0x016f2818
+
+/*
+ * Print a string on the debug console
+ *
+ * Clobbers: r0, r1, r2, r3, r12
+ */
+#define PRINT(s)                                    \
+    ldr     r2, =98f;                               \
+    add     r2, r2, r9;                             \
+    mov     r1, #0;                                 \
+97: ldrb    r3, [r2, r1];                           \
+    add     r1, r1, #1;                             \
+    cmp     r3, #0;                                 \
+    bne     97b;                                    \
+    mov     r0, #CONSOLEIO_write;                   \
+    mov     r12, #__HYPERVISOR_console_io;          \
+    __HVC(XEN_HYPERCALL_TAG);                       \
+.pushsection .rodata.str, "aMS", %progbits, 1;      \
+98: .asciz  s;                                      \
+.popsection
+
+.section ".text.head", "ax", %progbits
+.arm
+
+/*
+ * Common register usage for assembly boot code
+ *
+ * r10 - DTB physical address (boot CPU only)
+ * r9 - Offset between PA and VA ( PA - VA)
+ */
+ENTRY(_start)
+    /* 8 NOPs that make the compressed kernel bootable on legacy ARM systems */
+.rept 8
+    mov     r0, r0
+.endr
+    b       startup
+    /* Magic number used to identify this is an ARM Linux zImage */
+    .word   ZIMAGE_MAGIC_NUMBER
+    /* The address the zImage starts at (0 = relocatable) */
+    .word   0
+    /* The address the zImage ends at */
+    .word   (_end - _start)
+startup:
+    /* Save DTB pointer */
+    mov     r10, r2
+
+    /* Calculate where we are */
+    ldr     r0, =_start              /* r0 := vaddr(_start) */
+    adr     r8, _start               /* r8 := paddr(_start) */
+    sub     r9, r8, r0               /* r9 := phys-offset */
+
+    PRINT("- XTF booting -\n")
+
+    /* Start an infinite loop */
+    PRINT("- Infinite loop -\n")
+1:  b       1b

arch/arm/arm32/hypercall.S

@@ -0,0 +1,72 @@
+/*
+ * Xen hypercall wrappers
+ *
+ * Stefano Stabellini <stefano.stabellini@eu.citrix.com>, Citrix, 2012
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation; or, when distributed
+ * separately from the Linux kernel or incorporated into other
+ * software packages, subject to the following license:
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this source file (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy, modify,
+ * merge, publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include <xtf/asm_macros.h>
+#include <xen/xen.h>
+
+#define HYPERCALL_SIMPLE(hypercall)     \
+ENTRY(hypercall_##hypercall)            \
+    mov r12, #__HYPERVISOR_##hypercall; \
+    __HVC(XEN_HYPERCALL_TAG);           \
+    mov pc ,lr;                         \
+ENDFUNC(hypercall_##hypercall)
+
+#define HYPERCALL0 HYPERCALL_SIMPLE
+#define HYPERCALL1 HYPERCALL_SIMPLE
+#define HYPERCALL2 HYPERCALL_SIMPLE
+#define HYPERCALL3 HYPERCALL_SIMPLE
+#define HYPERCALL4 HYPERCALL_SIMPLE
+
+#define HYPERCALL5(hypercall)           \
+ENTRY(hypercall_##hypercall)            \
+    stmdb sp!, {r4};                    \
+    ldr r4, [sp, #4];                   \
+    mov r12, #__HYPERVISOR_##hypercall; \
+    __HVC(XEN_HYPERCALL_TAG);           \
+    ldm sp!, {r4};                      \
+    mov pc ,lr;                         \
+ENDFUNC(hypercall_##hypercall)
+
+.text
+
+HYPERCALL2(xen_version);
+HYPERCALL3(console_io);
+HYPERCALL3(grant_table_op);
+HYPERCALL2(sched_op);
+HYPERCALL2(event_channel_op);
+HYPERCALL2(hvm_op);
+HYPERCALL2(memory_op);
+HYPERCALL2(physdev_op);
+HYPERCALL3(vcpu_op);
+HYPERCALL1(tmem_op);
+HYPERCALL2(multicall);
+HYPERCALL2(vm_assist);
+HYPERCALL1(sysctl);
+HYPERCALL1(domctl);

arch/arm/arm64/cache.S

@@ -0,0 +1,26 @@
+#include <xtf/asm_macros.h>
+
+/*
+ * clean_and_invalidate_dcache(start, end)
+ * - x0(start) - start address of a region
+ * - x1(end)   - end address of a region
+ * Clobbers: x2, x3, x4
+ */
+ENTRY(clean_and_invalidate_dcache)
+    /* Do not modify x0 */
+    mov    x4, x0
+    /* Get the minimum D-cache line size */
+    mrs    x3, ctr_el0
+    ubfm   x3, x3, #16, #19
+    mov    x2, #4
+    lsl    x2, x2, x3
+    sub    x3, x2, #1
+    bic    x4, x4, x3
+    /* Clean and invalidate D-cache line */
+1:  dc     civac, x4
+    add    x4, x4, x2
+    cmp    x4, x1
+    b.lo   1b
+    dsb    sy
+    ret
+ENDFUNC(clean_and_invalidate_dcache)