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Adds tests for isnan(). #466

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Adds tests for isnan(). #466

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16a4666
Adds tests for isnan().
danbrown-amd Oct 9, 2025
57046d5
Removes XFAIL for Clang-Vulkan.
danbrown-amd Oct 10, 2025
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68 changes: 68 additions & 0 deletions test/Feature/HLSLLib/isnan.16.test
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Original file line number Diff line number Diff line change
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#--- source.hlsl

StructuredBuffer<half4> In : register(t0);
RWStructuredBuffer<bool4> Out : register(u1);

[numthreads(1,1,1)]
void main() {
Out[0] = isnan(In[0]);
bool4 Tmp = {isnan(In[0].xyz), isnan(In[0].w)};
Out[1] = Tmp;
Out[2].xy = isnan(In[0].xy);
}

//--- pipeline.yaml

---
Shaders:
- Stage: Compute
Entry: main
DispatchSize: [1, 1, 1]
Buffers:
- Name: In
Format: Float16
Stride: 8
Data: [0x7c00, 0xfc00, 0x3c00, 0x7e00] # Inf, -Inf, 1, Nan
- Name: Out
Format: Bool
Stride: 16
ZeroInitSize: 48
- Name: ExpectedOut # The result we expect
Format: Bool
Stride: 16
Data: [0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1]
Results:
- Result: Test1
Rule: BufferExact
Actual: Out
Expected: ExpectedOut
DescriptorSets:
- Resources:
- Name: In
Kind: StructuredBuffer
DirectXBinding:
Register: 0
Space: 0
VulkanBinding:
Binding: 0
- Name: Out
Kind: RWStructuredBuffer
DirectXBinding:
Register: 1
Space: 0
VulkanBinding:
Binding: 1
...
#--- end

# https://github.com/llvm/llvm-project/issues/145571
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@farzonl farzonl Oct 10, 2025

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We added the isnan emulation see https://github.com/llvm/llvm-project/pull/157505/files this should work for clang.

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@danbrown-amd danbrown-amd Oct 10, 2025

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I don't have an nVidia GPU, so I suppose I can't test for DirectX-NV?

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@farzonl farzonl Oct 10, 2025

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We don't run the nvidia gpu runner yet on the PR runs. and the only way to manually invoke it would be if you had a branch on this repository. There doesn't apear to be anyway to do that with a fork. That said I feel confident that if you are seeing the emulation passing on amd\intel for sm 6.8 and lower then it should pass for nvidia too since we won't be emitting the opcode that would blow things up.

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@damyanp damyanp Oct 23, 2025 •
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If you add a test-all label to the PR then it should run against all the machines in the offload tester lab.

https://github.com/llvm/offload-test-suite/blob/main/docs/CI.md

If this doesn't work for PRs from forks we should update these docs!

# XFAIL: Clang && DirectX-NV

# A bug in the Metal Shader Converter caused it to mis-translate this operation.
# Version 3 fixes this issue.
# UNSUPPORTED: Clang-Metal && !metal-shaderconverter-3.0.0-or-later

# REQUIRES: Half
# RUN: split-file %s %t
# RUN: %dxc_target -enable-16bit-types -T cs_6_5 -Fo %t.o %t/source.hlsl
# RUN: %offloader %t/pipeline.yaml %t.o
63 changes: 63 additions & 0 deletions test/Feature/HLSLLib/isnan.32.test
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Original file line number Diff line number Diff line change
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#--- source.hlsl

StructuredBuffer<float4> In : register(t0);
RWStructuredBuffer<bool4> Out : register(u1);

[numthreads(1,1,1)]
void main() {
Out[0] = isnan(In[0]);
bool4 Tmp = {isnan(In[0].xyz), isnan(In[0].w)};
Out[1] = Tmp;
Out[2].xy = isnan(In[0].xy);
}

//--- pipeline.yaml

---
Shaders:
- Stage: Compute
Entry: main
DispatchSize: [1, 1, 1]
Buffers:
- Name: In
Format: Float32
Stride: 16
Data: [inf, -inf, 1.0, nan] # Inf, -Inf, 1, Nan
- Name: Out
Format: Bool
Stride: 16
ZeroInitSize: 48
- Name: ExpectedOut # The result we expect
Format: Bool
Stride: 16
Data: [0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1]
Results:
- Result: Test1
Rule: BufferExact
Actual: Out
Expected: ExpectedOut
DescriptorSets:
- Resources:
- Name: In
Kind: StructuredBuffer
DirectXBinding:
Register: 0
Space: 0
VulkanBinding:
Binding: 0
- Name: Out
Kind: RWStructuredBuffer
DirectXBinding:
Register: 1
Space: 0
VulkanBinding:
Binding: 1
...
#--- end

# llvm/llvm-project#141089
# XFAIL: Clang-Vulkan

# RUN: split-file %s %t
# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl
# RUN: %offloader %t/pipeline.yaml %t.o
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