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This generator attempts to generate insn32.decode file in the qemu project. Currently UDB does not have instruction formats so I have added a basic mapping in the python script and a todo to remove it once the UDB has that information.

To generate insn32.decode run the command inside the backends/generators/qemu/ directory:

python3 generate_insn32_decode.py --include-all --arch BOTH --output generated_insn32_decode_output

Resolves issue: #1255

@ThinkOpenly ThinkOpenly changed the title feat(backends): add qemu gemerator for RISC-V instruction set feat(backends): add QEMU generator for RISC-V instruction set Nov 21, 2025
- Implement a generator that generates insn32.decode for qemu.
- Move load_full_instructions to generator.py so that other generators
  can use it.

Resolves issue: riscv-software-src#1255
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