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"soundwire: cadence_master: set frame shape and divider based on actual clk freq" is the only new commit. CI reports below error without this commit.

[  405.383015] soundwire sdw-master-0-0: Controller Timed out on bank switch
[  405.383126] soundwire sdw-master-0-0: multi link bank switch failed: -110

The issue happens randomly when cdns_init_clock_ctrl() and cdns_bus_conf() set different divider. In theory, divider could be changed. But, the existing code set max_clk_freq in cdns_init_clock_ctrl() and set curr_dr_freq in sdw_initialize_slave() which doesn't make sense to me. The PR suggests setting curr_dr_freq if it is present.

To reproduce the issue:
Run 2 times for each below command one by one on LNL_SDW_AIOC devices.
TPLG=/lib/firmware/intel/sof-ipc4-tplg/sof-lnl-rt711-l0-rt1316-l23-rt714-l1.tplg MODEL=LNLM_SDW_AIOC SOF_TEST_INTERVAL=5 ~/sof-test/test-case/check-playback.sh -d 3 -l 3 -r 1
TPLG=/lib/firmware/intel/sof-ipc4-tplg/sof-lnl-rt711-l0-rt1316-l23-rt714-l1.tplg MODEL=LNLM_SDW_AIOC SOF_TEST_INTERVAL=5 ~/sof-test/test-case/check-capture.sh -d 3 -l 3 -r 1
TPLG=/lib/firmware/intel/sof-ipc4-tplg/sof-lnl-rt711-l0-rt1316-l23-rt714-l1.tplg MODEL=LNLM_SDW_AIOC SOF_TEST_INTERVAL=5 ~/sof-test/test-case/check-playback.sh -d 3 -l 1 -r 3
TPLG=/lib/firmware/intel/sof-ipc4-tplg/sof-lnl-rt711-l0-rt1316-l23-rt714-l1.tplg MODEL=LNLM_SDW_AIOC SOF_TEST_INTERVAL=5 ~/sof-test/test-case/check-capture.sh -d 3 -l 1 -r 3

@bardliao bardliao requested a review from plbossart September 16, 2024 11:42
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not following why you have 2 PRs that look mostly identical @bardliao? Which one do you want us to review?

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not following why you have 2 PRs that look mostly identical @bardliao? Which one do you want us to review?

Please review #5160. This PR is to discuss the 60f5a6b commit only

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SOFCI TEST

@bardliao bardliao force-pushed the sdw-clock branch 2 times, most recently from 7ded0c4 to 059f9ed Compare October 31, 2024 08:30
@bardliao bardliao changed the title [RFC] soundwire: cadence_master: set frame shape and divider based on actual clk freq soundwire: cadence_master: set frame shape and divider based on actual clk freq Nov 1, 2024
@bardliao bardliao marked this pull request as ready for review November 1, 2024 03:25
@bardliao bardliao requested review from ranj063 and ujfalusi November 1, 2024 03:25
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bardliao commented Nov 1, 2024

Rebase to the latest topic/sof-dev branch and the CI test result looks good to me.

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I think we should return an error in this case, so change the return type from void to int for this function?

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I think we should return an error in this case, so change the return type from void to int for this function?

Agree, done

…l clk freq

Frame shape and curr_dr_freq could be updated by sdw_compute_bus_params().
Peripherals will set curr_dr_freq as their frequency. Managers
should do the same. Then update frame shape according to the actual
bus frequency.

Signed-off-by: Bard Liao <[email protected]>
Now, we can support more than 1 soundwire bus clock frequency.

This reverts commit c326356.

Signed-off-by: Bard Liao <[email protected]>
@ranj063 ranj063 merged commit b0dc371 into thesofproject:topic/sof-dev Nov 12, 2024
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4 participants