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@bardliao bardliao commented Dec 6, 2024

This is a rebase version of #4679
I removed the removal of select' statements at a higher level. in the SND_SOC_SOF_HDA_LINK_BASELINE config in af779a3 which I think it is removed by accident.

@bardliao bardliao force-pushed the sdw/start-BRA-support branch from 5d16674 to 1b0b781 Compare December 6, 2024 05:33
@bardliao bardliao force-pushed the sdw/start-BRA-support branch from 1b0b781 to 336a2f4 Compare December 24, 2024 07:44
@bardliao bardliao force-pushed the sdw/start-BRA-support branch 4 times, most recently from 4291dd7 to 1eb379b Compare January 6, 2025 12:32
@bardliao bardliao marked this pull request as ready for review January 6, 2025 12:55
@bardliao bardliao force-pushed the sdw/start-BRA-support branch from 1eb379b to 8debac1 Compare January 7, 2025 07:47
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nice update @bardliao, keep up the good work.

Don't forget to add your own Signed-off-by tag.

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didn't you provide multi-lane support already?

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Indeed, that is great.

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typo: PDI0 and PDI1.

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fixed

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also remove "All rights reserved", not aligned with Intel recommendations.

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done

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need explanation of this value, I think it's 9.6MHz * Double data rate factor.
but if you can vary the clock now you'd need to use the max clock before using BRA/BPT...

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@plbossart I think it is the sampling rate of the HDA stream. But I am not sure how does it related to the SoundWire bus rate. The SDW bus clock and the HDA sampling rate seems to be independent to me.
I guess why 192000 is because that is the max value of rate_bits[].

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I can't recall where this came from... certainly something related to HDaudio format but why did we take 192k as the reference?

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probably need an error message if the DMA position was never cleared and the timeout happens?

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done

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I can't remember if there's any reason to disable RX first?

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I think it is because we enable TX first. So to be symmetrical, we disable RX first.

@bardliao bardliao force-pushed the sdw/start-BRA-support branch 2 times, most recently from 470fcc9 to fa54048 Compare January 8, 2025 08:51
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@ujfalusi can you give this a review too. Thanks !

@bardliao bardliao force-pushed the sdw/start-BRA-support branch from fa54048 to dc995f8 Compare January 9, 2025 03:11
ranj063
ranj063 previously approved these changes Jan 9, 2025
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@bardliao, I think you should add your signed-off-by and if your changes tot he original code warrants it and if @plbossart agrees, probably a Co-developed as well?

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SDW_STREAM_BPT is yet to be added, we only have definition for PCM and PDM

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@bardliao bardliao Jan 13, 2025

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Swapped the commits order with the next commit.

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why do we pass the stream->type as a separate parameter via bpt_stream?

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Good suggestion. Removed.

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if (stream->type == SDW_STREAM_BPT) {

?

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one line?

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done

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I would check a log and drop debug prints to make it less noisy?

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ok, removed

BPT/BRA need to be special cased, i.e. there's no point in using the
bandwidth allocation since the entire frame can be used.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
In the existing definition of sdw_stream_runtime, the 'type' member is
never set and defaults to PCM. To prepare for the BPT/BRA support, we
need to special-case streams and make use of the 'type'.

No functional change for now, the implicit PCM type is now explicit.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
For BPT support, we want to allocate the entire audio payload and
bypass the allocation based on PCM/PDM parameters.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
@bardliao bardliao force-pushed the sdw/start-BRA-support branch from 1811ffb to e297ac6 Compare January 16, 2025 01:43
DP0 (Data Port 0) is very similar to regular data ports, with minor
tweaks we can reuse the same code.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
@bardliao bardliao force-pushed the sdw/start-BRA-support branch 2 times, most recently from c292254 to 6efefed Compare January 16, 2025 03:20
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@bardliao, not much to comment on the functionality and flow, but can you check the patches for lines that can be folded?

I checked and folded the lines. Hope I didn't miss any.

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@bardliao, I only really have few small comments left..

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Probably a single WARN from hda_sdw_bpt_open() is enough to catch the attention?

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Yes, but it is harmless to have WARN in every function.

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it is a good practice to protect the header with

#ifndef __HDA_SDW_BPT_H
#define __HDA_SDW_BPT_H
...
#endif /* __HDA_SDW_BPT_H */

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Sure, but adding a helper to do a sync transfer does not mean that the async and wait cannot be used as described while helping users to avoid duplicated code.
The do_bpt_sequence() could be as simple as:

static int do_bpt_sequence(struct sdw_slave *slave, bool write, u8 *buffer)
{
	struct sdw_bpt_msg msg = {0};

	msg.addr = start_addr;
	msg.len = num_bytes;
	msg.dev_num = slave->dev_num;
	if (write)
		msg.flags = SDW_MSG_FLAG_WRITE;
	else
		msg.flags = SDW_MSG_FLAG_READ;
	msg.buf = buffer;

	return sdw_bpt_send_sync(slave->bus, slave, &msg); /* Errors printed in the helper */
}

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this can fit to one line ;)

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fixed

plbossart and others added 10 commits January 16, 2025 16:21
Add definitions and helpers for the BPT/BRA protocol. Peripheral
drivers (aka ASoC codec drivers) can use this API to send bulk data
such as firmware or tables. The design intent is however NOT to
directly use this API but to rely on an intermediate regmap layer.

The API is only available when no other audio streams have been
allocated, and only one BTP/BRA stream is allowed per link. To avoid
the addition of yet another lock, the refcount tests are handled in
the stream master_runtime alloc/free routines where the bus_lock is
already held. Another benefit of this approach is that the same
bus_lock is used to handle runtime and port linked lists, which
reduces the potential for misaligned configurations.

In addition to exclusion with audio streams, BPT transfers have a lot
of overhead, specifically registers writes are needed to enable
transport in DP0. Most DMAs don't handle too well very small data sets
and they may have alignment limitations.

The size and alignment requirements are for now not handled by the
core but must be checked by platform-specific drivers.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
Add a convenience pointer to the 'sdw_bus' structure. BPT is a
dedicated stream which will typically not be handled by DAIs or
dailinks. Since there's only one BPT stream per link, storing the
pointer at the link level seems rather natural.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
The Cadence IP expects a specific format (detailed in the
Documentation). Add helpers to copy the data into the DMA buffer.

The crc8 table is for now only used by the Cadence driver. This table
might be moved to a common module at a later point if needed by other
controller implementations.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
Mirror abstraction added for master ops.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
Add SoundWire BPT DMA helpers as a separate module to avoid circular
dependencies.

For now this assumes no link DMA, only coupled mode.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
This is needed to be shared between open/send_async/close.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
Add support for BTP API using Cadence and hda-sdw-bpt helpers.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
When the firmware is involved, the data can be transferred with a
CHAIN_DMA on LNL+.

The CHAIN_DMA needs to be programmed before the DMAs per the
documentation. The states are not exactly symmetrical, on stop we must
do a PAUSE and RESET.

The FIFO size of 10ms was determined experimentally. With the minimum
of 2ms, errors were reported by the codec, likely because of xruns.

The code flow deals with the two TX and RX CHAIN_DMAs in symmetrical
ways, i.e.
alloc TX
alloc RX
enable TX
enable RX
disable RX
disable TX
free RX
free TX

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
Add code to show what codec drivers will need to do to enable BPT/BRA
transfers. The only difference is to set the 'command_type' file to
'1'. A zero-value will rely on regular read/write commands in Column0.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
DP0 is required for BPT/BRA transport.

Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
@bardliao bardliao force-pushed the sdw/start-BRA-support branch from 6efefed to 1f40c2e Compare January 16, 2025 08:31
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@bardliao (and @plbossart ) thank you I think this looks pretty nice!

@bardliao bardliao requested review from plbossart and ranj063 January 16, 2025 09:26
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ranj063 commented Jan 22, 2025

SOFCI TEST

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one typo in comments, this can be handled with a fixup, thanks @bardliao

that stream can connect master ports as well as all peripheral
DP0 ports.

(5) BRA transfers only make sense in the concept of one
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in the context of

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I can't recall where this came from... certainly something related to HDaudio format but why did we take 192k as the reference?

@bardliao bardliao merged commit fb2c628 into thesofproject:topic/sof-dev Jan 23, 2025
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@plbossart The fixup PR: #5305

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5 participants