soc: nxp: ke1xz: Enhance power management with STOP modes #101458
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The run log: |
zephyrbot
added
area: Boards/SoCs
platform: NXP
zephyrbot
requested review from
JordanYates,
bjarki-andreasen,
butok,
ceolin,
mmahadevan108,
nashif,
teburd and
tmleman
Implement proper STOP mode support with partial stop options, add power state timing characteristics, and enable LPTMR-based wake-up for KE1xZ SoC family. - Fix STOP mode entry with correct SLEEPDEEP and PSTOPO configuration - Add min-residency-us/exit-latency-us to all power states - Use LPTMR as cortex-m-idle-timer for low-power operation - Add power_mgmt_soc test support for FRDM-KE17Z Signed-off-by: Holt Sun <[email protected]>
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@Albort12138 @ZhaoxiangJin , please help review. |
bjarki-andreasen
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Dec 23, 2025
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Looks good, but I'm suspicious of the __enable_irq()
Albort12138
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Dec 23, 2025
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| void pm_state_set(enum pm_state state, uint8_t substate_id) | ||
| { | ||
| __enable_irq(); |
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Suggested change
| __enable_irq(); | |
| __disable_irq(); |
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The interrupt is necessary for waking up(recovery):
Albort12138
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Dec 23, 2025
| } | ||
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| /* Ensure STOPM is set to normal STOP (not VLPS/VLLS families), if present. */ | ||
| SMC->PMCTRL = (SMC->PMCTRL & ~SMC_PMCTRL_STOPM_MASK) | SMC_PMCTRL_STOPM(0U); |
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| SMC->PMCTRL = (SMC->PMCTRL & ~SMC_PMCTRL_STOPM_MASK) | SMC_PMCTRL_STOPM(0U); | |
| SMC->PMCTRL &= ~SMC_PMCTRL_STOPM_MASK; | |
| @@ -1,5 +1,5 @@ | |||
| /* | |||
| * Copyright 2024 NXP | |||
| * Copyright 2024, 2025 NXP | |||
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2024-2025, also other files.
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| # Keep LPTMR as wake/idle timer via counter API | ||
| CONFIG_COUNTER=y | ||
| CONFIG_COUNTER_MCUX_LPTMR=y |
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CONFIG_COUNTER_MCUX_LPTMR not needed manually set to y here guess.
| config MCUX_LPTMR_TIMER | ||
| default y if PM | ||
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| config CORTEX_M_SYSTICK |
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Maybe we can change it to configdefault CORTEX_M_SYSTICK at the same time?
dts/arm/nxp/nxp_ke1xz.dtsi
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| idle: idle { | ||
| compatible = "zephyr,power-state"; | ||
| power-state-name = "runtime-idle"; | ||
| min-residency-us = <10>; |
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What is the clock frequency of the LPTMR? I think the min-residency-us value needs careful consideration, as 10us may not be sufficient for even one hardware cycle of the LPTMR.
Albort12138
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Dec 23, 2025
| compatible = "arm,cortex-m0+"; | ||
| clock-frequency = <DT_FREQ_M(48)>; | ||
| reg = <0>; | ||
| cpu-power-states = <&idle &stop &pstop1 &pstop2>; |
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| cpu-power-states = <&idle &pstop2 &pstop1 &stop>; |
Based on this order, to find the appropriate mode more efficiently
Albort12138
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Dec 23, 2025
| compatible = "zephyr,power-state"; | ||
| power-state-name = "suspend-to-idle"; | ||
| substate-id = <1>; | ||
| min-residency-us = <60>; |
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Where residency come from?
| power-state-name = "runtime-idle"; | ||
| min-residency-us = <10>; | ||
| /* 0.7 µs rounded */ | ||
| exit-latency-us = <1>; |
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The exit-latency-us value should be incremented across different power modes.
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To be honest, I'm not sure if your MCU has actually gone to low power mode. Look here: LPTMR can only be correctly configured as the wake-up source when |
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Implement proper STOP mode support with partial stop options, add power state timing characteristics, and enable LPTMR-based wake-up for KE1xZ SoC family.