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@tomtor tomtor commented Jan 28, 2019

I played a bit with examples/soc_ecp5_evn and could not get the COMPRESSED_ISA
option working for non trivial programs (conditional jump destinations got garbled in some situations).

By enabling debug() in picorv32.v I could see that a 4-byte instruction at e.g. 0x0x0102
got bits [31:16] from 0x0x100. The root cause is that the current example does NOT use the mem_la_* interface.

That is fine when COMPRESSED_ISA is disabled, but when it is enabled picorv32 sometimes uses the
read data already in the next cycle, when it is not yet available. Adding and using the mem_la_* interface fixes this.

I also wondered why debug() did not show DECODE when ENABLE_IRQ was enabled, but that was caused by irq being set to 32'hx because it was not used in attosoc.v. I added irq/eoi to the used interface.

Some additional changes are (I could create a new PR if you don't like these):

Expand memory to 64K.

Add simple start.S with minimal trap handler
(partially copied from https://github.com/cliffordwolf/picorv32/blob/master/firmware/start.S)

Add printf from https://github.com/mpaland/printf and use it in firmware.c

Use SITE "L19" for UART output, because I use the ECP5-EVN board in the default factory setting without adding 0-ohm bridges to route UART to the FTDI chip. I use a standard USB-serial adapter to read the output from L19 instead.

and some other additions to the example:

Add simple start.S with minimal trap handler
(see https://github.com/cliffordwolf/picorv32/blob/master/firmware/start.S
for a bigger version)

Add irq interface to attosoc.v for working debug() in picorv32.v

Add printf from https://github.com/mpaland/printf

Use SITE "L19" for uart output

Signed-off-by: Tom Vijlbrief <[email protected]>
ram_ready is always true when using look ahead interface

Signed-off-by: Tom Vijlbrief <[email protected]>
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